超越 Google的晶片擺置演算法彈性
聯發科、至達科技與臺大合作論文獲選為頂尖會議DAC大會宣傳論文

Best VLSI Floorplan Solution

Efficient

Consider macro and standard cell 
Reduce project runtime
Explore different style and objective

Effective

Shorten routed wire length
​Reduce timing violation
Improve routability

Faster Runtime 

GPU accelerated placement: 20X speedup
10 million cells in 10 minutes
                                                                                                                   * NVIDIA GeForce 1080Ti ; Intel i9-9900K
* DAC/ICCAD 2012 benchmarks

Better Routability

Reduce 85% of routing overflows

Macro Handcrafted Style

Consider regularity to improve power plan and congestion
Picture
Floating macro style

Exploration

Flexible configuration system
Dataflow analysis
Recipes for various objectives

Customized Automation

Provide unique customized automation for best solution
Reduce 30% wire length on specific layout styles

Products to Accelerate APR Flow

Solutions for prototyping and macro placement
Auto Macro Placer & Floorplan Exploration
Dataflow Extractor & Visualizer