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MAX Electronic Design Automation

News

2019 March
  • Congratulations! Maxeda R&D engineer Pei-Yu Lee co-works with National Chiao-Tung University and National Taiwan University to win the 1st Prize of TAU 2019 Timing Contest on Design Optimization! There are 10 contest participants from worldwide. The 1st Prize team (iTimer) has a total score 391 (max score is 400) that outperform the 2nd place team (score 242, Democritus University of Thrace, Xanthi, Greece) and  the 3rd place team (score 181, from University of Texas at Austin and Yale University). The 1st Prize team uses the most advanced buffer insertion/deletion and buffer resizing techniques to optimize designs and explore incrementality and parallelism of optimizations within static timers.
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2019
  • 2019/1 技術論文發表 Technical Publication (Session 7C): MDP-trees: Multi-Domain Macro Placement for Ultra Large-Scale Mixed-Size Designs, in 24th Asia and South Pacific Design Automation Conference (ASPDAC) Jan. 2019
    • We present a new  hybrid  representation  of  slicing  trees and multi-packing trees, called multi-domain-packing trees (MDP-trees), for macro placement to handle ultra large-scale multidomain mixed-size designs. Based on binary trees, the MDP-tree is very efficient and effective for handling macro placement with multiple domains. MDP-trees optimize the interconnections among domains and macro/cell positions simultaneously. The area of each domain is well reserved, and the macro displacement is minimized from initial macro positions of the design prototype. Experimental results show that our approach can significantly reduce both the average half-perimeter wirelength and the average global routing wirelength.
2018
  • [Invited Talk] Automatic Macro Placement
    日期:107年7月19日
    http://cad.ee.ccu.edu.tw/pda/lecture
    IEEE/ACM International Workshop and Seasonal School on Physical Design Automation 

  • 新竹市SBIR計畫成果發表會
    日期:107年7月26日(星期四) 上午10:00
    地點:國立清華大學創新育成大樓正文展演廳
    (新竹市光復路二段101號南大門-寶山路/高翠路口)

  • 技術論文發表 Technical Publication: NTUplace4dr: A Detailed-Routing-Driven Placer for Mixed-Size Circuit Designs with Technology and Region Constraints, in  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Volume: 37, Issue: 3, March 2018

  • 2018/1 技術論文發表 Technical Publication (Session 2D): FastPass: Fast Timing Path Search for Generalized Timing Exception Handling, in 23rd Asia and South Pacific Design Automation Conference (ASPDAC) Jan. 2018

2017
  • 2017/11 技術論文發表 Technical Publication (Session 7A.2): A Novel Damped-Wave Framework for Macro Placement​, in International Conference on Computer Aided Design (ICCAD) Nov. 2017

  • 2017/11 技術論文發表 Technical Publication (Session 7A.1): An Integrated-Spreading-Based Macro-Refining Algorithm for Large-Scale Mixed-Size Circuit Designs, in International Conference on Computer Aided Design (ICCAD) Nov. 2017

  • 2017/11 技術論文發表 Technical Publication (Session 1C.2): Blockage-Aware Terminal Propagation for Placement Wirelength Minimization, in International Conference on Computer Aided Design (ICCAD) Nov. 2017

  • 2017/09 榮獲新竹市SBIR補助

  • 2017/03  執行長陳東傑博士獲臺灣大學電子所推薦為106年「電子菁英特殊貢獻獎」獲獎人

2016
  • 2016/12  產學交流座談會 Panel Discussion at EDA Workshop 2016

  • 2016/11  新一代產品發表會

  • 2015/09  ​榮獲行政院國家發展基金 (創業天使計畫)

​​2015
  • 2015/08  超大型積體電路設計暨計算機輔助設計技術研討會 研究生論壇講者 VLSI Design/CAD Symposium Graduate Student Forum 
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​新竹市SBIR計畫成果發表會
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ASP-DAC 2018 Technical Paper
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ICCAD 2017 Technical Paper
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新竹市 SBIR
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Maxeda Technology Inc.
14F-6, No. 27, Guanxin Rd.
​Hsinchu, Taiwan 300
​TEL: +886-3621-4888
​support@maxeda.tech
至達科技股份有限公司
300​新竹市東區
​關新路27號14樓之6
03-621-4888
support@maxeda.tech


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